An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer

Wenbin He, Fan Ye 0001, Junyan Ren. An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-4, IEEE, 2021. [doi]

Abstract

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