Garo Bournoutian, Alex Orailoglu. Dynamic, non-linear cache architecture for power-sensitive mobile processors. In Tony Givargis, Adam Donlin, editors, Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010, part of ESWeek 10 Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010. pages 187-194, ACM, 2010. [doi]
Abstract is missing.