Logic gates and memory elements design and simulation using PMOS organic transistor - researchr publication authors

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P. Branchini, A. Fabbh, D. Riondino, Luigi Mariucci, Matteo Rapisarda, Antonio Valletta, A. Aloisio, F. Di Capua. Logic gates and memory elements design and simulation using PMOS organic transistor. In IEEE 26th International Symposium on Industrial Electronics, ISIE 2017, Edinburgh, United Kingdom, June 19-21, 2017. pages 2097-2101, IEEE, 2017. [doi]

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