Array-Specific Dataflow Caches for High-Level Synthesis of Memory-Intensive Algorithms on FPGAs

Giovanni Brignone, M. Usman Jamal, Mihai T. Lazarescu, Luciano Lavagno. Array-Specific Dataflow Caches for High-Level Synthesis of Memory-Intensive Algorithms on FPGAs. IEEE Access, 10:118858-118877, 2022. [doi]

Abstract

Abstract is missing.