Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic

Randal E. Bryant, Steven M. German, Miroslav N. Velev. Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic. ACM Trans. Comput. Log., 2(1):93-134, 2001. [doi]

Authors

Randal E. Bryant

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Steven M. German

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Miroslav N. Velev

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