Selective High-Latency Arithmetic Instruction Reuse in Multicore Processors - researchr publication authors

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Claudiu Buduleci, Arpad Gellert, Adrian Florea. Selective High-Latency Arithmetic Instruction Reuse in Multicore Processors. In Radu-Emil Precup, editor, 27th International Conference on System Theory, Control and Computing, ICSTCC 2023, Timisoara, Romania, October 11-13, 2023. pages 410-415, IEEE, 2023. [doi]

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