Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS

A. R. Bugeja, Sung-Ung Kwak. Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 428-431, IEEE, 2001. [doi]

Abstract

Abstract is missing.