David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David Blaauw. A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 284-285, IEEE, 2010. [doi]
Abstract is missing.