José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings. Adding instruction cache effect to schedulability analysis of preemptive real-time systems. In 2nd IEEE Real-Time Technology and Applications Symposium (RTAS 96), June 10-12, 1996, Boston, MA, USA. pages 204, IEEE Computer Society, 1996. [doi]
@inproceedings{Busquets-MataixSOGW96,
title = {Adding instruction cache effect to schedulability analysis of preemptive real-time systems},
author = {José V. Busquets-Mataix and Juan José Serrano and Rafael Ors and Pedro J. Gil and Andy J. Wellings},
year = {1996},
url = {http://computer.org/proceedings/rtas/7448/74480204abs.htm},
tags = {caching, analysis},
researchr = {https://researchr.org/publication/Busquets-MataixSOGW96},
cites = {0},
citedby = {0},
pages = {204},
booktitle = {2nd IEEE Real-Time Technology and Applications Symposium (RTAS 96), June 10-12, 1996, Boston, MA, USA},
publisher = {IEEE Computer Society},
}