Pavan Kumar Bussa, Jeffrey Goeders, Steven J. E. Wilton. Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques. In Marco D. Santambrogio, Diana Göhringer, Dirk Stroobandt, Nele Mentens, Jari Nurmi, editors, 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017. pages 1-4, IEEE, 2017. [doi]
@inproceedings{BussaGW17,
title = {Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques},
author = {Pavan Kumar Bussa and Jeffrey Goeders and Steven J. E. Wilton},
year = {2017},
doi = {10.23919/FPL.2017.8056800},
url = {https://doi.org/10.23919/FPL.2017.8056800},
researchr = {https://researchr.org/publication/BussaGW17},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017},
editor = {Marco D. Santambrogio and Diana Göhringer and Dirk Stroobandt and Nele Mentens and Jari Nurmi},
publisher = {IEEE},
isbn = {978-9-0903-0428-1},
}