FPGA Investigation on Error-Floor Performance of a Concatenated Staircase and Hamming Code for 400G-ZR Forward Error Correction

Yi Cai, Weiming Wang, Weifeng Qian, Jia Xing, Kai Tao, Junjie Yin, Shihua Zhang, Ming Lei, Erkun Sun, Ke Yang, Hungchang Chien, Qun Liao, Huan Chen. FPGA Investigation on Error-Floor Performance of a Concatenated Staircase and Hamming Code for 400G-ZR Forward Error Correction. In Optical Fiber Communications Conference and Exposition, OFC 2018, San Diego, CA, USA, March 11-15, 2018. pages 1-3, IEEE, 2018. [doi]

Authors

Yi Cai

This author has not been identified. Look up 'Yi Cai' in Google

Weiming Wang

This author has not been identified. Look up 'Weiming Wang' in Google

Weifeng Qian

This author has not been identified. Look up 'Weifeng Qian' in Google

Jia Xing

This author has not been identified. Look up 'Jia Xing' in Google

Kai Tao

This author has not been identified. Look up 'Kai Tao' in Google

Junjie Yin

This author has not been identified. Look up 'Junjie Yin' in Google

Shihua Zhang

This author has not been identified. Look up 'Shihua Zhang' in Google

Ming Lei

This author has not been identified. Look up 'Ming Lei' in Google

Erkun Sun

This author has not been identified. Look up 'Erkun Sun' in Google

Ke Yang

This author has not been identified. Look up 'Ke Yang' in Google

Hungchang Chien

This author has not been identified. Look up 'Hungchang Chien' in Google

Qun Liao

This author has not been identified. Look up 'Qun Liao' in Google

Huan Chen

This author has not been identified. Look up 'Huan Chen' in Google