FPGA Investigation on Error-Floor Performance of a Concatenated Staircase and Hamming Code for 400G-ZR Forward Error Correction

Yi Cai, Weiming Wang, Weifeng Qian, Jia Xing, Kai Tao, Junjie Yin, Shihua Zhang, Ming Lei, Erkun Sun, Ke Yang, Hungchang Chien, Qun Liao, Huan Chen. FPGA Investigation on Error-Floor Performance of a Concatenated Staircase and Hamming Code for 400G-ZR Forward Error Correction. In Optical Fiber Communications Conference and Exposition, OFC 2018, San Diego, CA, USA, March 11-15, 2018. pages 1-3, IEEE, 2018. [doi]

@inproceedings{CaiWQXTYZLSYCLC18,
  title = {FPGA Investigation on Error-Floor Performance of a Concatenated Staircase and Hamming Code for 400G-ZR Forward Error Correction},
  author = {Yi Cai and Weiming Wang and Weifeng Qian and Jia Xing and Kai Tao and Junjie Yin and Shihua Zhang and Ming Lei and Erkun Sun and Ke Yang and Hungchang Chien and Qun Liao and Huan Chen},
  year = {2018},
  url = {http://ieeexplore.ieee.org/document/8386371},
  researchr = {https://researchr.org/publication/CaiWQXTYZLSYCLC18},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {Optical Fiber Communications Conference and Exposition, OFC 2018, San Diego, CA, USA, March 11-15, 2018},
  publisher = {IEEE},
  isbn = {978-1-943580-38-5},
}