Efficient Check Node Processing Architectures for Non-binary LDPC Decoding Using Power Representation

Fang Cai, Xinmiao Zhang. Efficient Check Node Processing Architectures for Non-binary LDPC Decoding Using Power Representation. VLSI Signal Processing, 76(2):211-222, 2014. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.