Jitter model of direct digital synthesis clock generators

Dorin Emil Calbaza, Yvon Savaria. Jitter model of direct digital synthesis clock generators. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 1-4, IEEE, 1999. [doi]

@inproceedings{CalbazaS99,
  title = {Jitter model of direct digital synthesis clock generators},
  author = {Dorin Emil Calbaza and Yvon Savaria},
  year = {1999},
  doi = {10.1109/ISCAS.1999.777791},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.1999.777791},
  researchr = {https://researchr.org/publication/CalbazaS99},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA},
  publisher = {IEEE},
  isbn = {0-7803-5471-0},
}