Andrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino. Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 501-504, ACM, 2007. [doi]
@inproceedings{CalimeraPSBMMP07,
title = {Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology},
author = {Andrea Calimera and Antonio Pullini and Ashoka Visweswara Sathanur and Luca Benini and Alberto Macii and Enrico Macii and Massimo Poncino},
year = {2007},
doi = {10.1145/1228784.1228903},
url = {http://doi.acm.org/10.1145/1228784.1228903},
tags = {data-flow, design},
researchr = {https://researchr.org/publication/CalimeraPSBMMP07},
cites = {0},
citedby = {0},
pages = {501-504},
booktitle = {Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007},
editor = {Hai Zhou and Enrico Macii and Zhiyuan Yan and Yehia Massoud},
publisher = {ACM},
isbn = {978-1-59593-605-9},
}