A data flow architecture with a paged memory system

L. J. Caluwaerts, J. Debacker, J. A. Peperstraete. A data flow architecture with a paged memory system. In 9th International Symposium on Computer Architecture (ISCA 1982), April 26-29, 1982, Austin, TX, USA. pages 120-127, IEEE Computer Society, 1982. [doi]

@inproceedings{CaluwaertsDP82,
  title = {A data flow architecture with a paged memory system},
  author = {L. J. Caluwaerts and J. Debacker and J. A. Peperstraete},
  year = {1982},
  doi = {10.1145/800048.801720},
  url = {http://doi.acm.org/10.1145/800048.801720},
  tags = {architecture, data-flow},
  researchr = {https://researchr.org/publication/CaluwaertsDP82},
  cites = {0},
  citedby = {0},
  pages = {120-127},
  booktitle = {9th International Symposium on Computer Architecture (ISCA 1982), April 26-29, 1982, Austin, TX, USA},
  publisher = {IEEE Computer Society},
}