Hardware implementation of a background substraction algorithm in FPGA-based platforms

Elisa Calvo-Gallego, Santiago Sánchez-Solano, Piedad Brox Jiménez. Hardware implementation of a background substraction algorithm in FPGA-based platforms. In IEEE International Conference on Industrial Technology, ICIT 2015, Seville, Spain, March 17-19, 2015. pages 1688-1693, IEEE, 2015. [doi]

Abstract

Abstract is missing.