Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications

Salvatore Campagna, Moazzam Hussain, Massimo Violante. Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications. In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010. pages 44-51, IEEE Computer Society, 2010. [doi]

@inproceedings{CampagnaHV10,
  title = {Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications},
  author = {Salvatore Campagna and Moazzam Hussain and Massimo Violante},
  year = {2010},
  doi = {10.1109/DFT.2010.12},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2010.12},
  researchr = {https://researchr.org/publication/CampagnaHV10},
  cites = {0},
  citedby = {0},
  pages = {44-51},
  booktitle = {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4244-8447-8},
}