Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays

Davor Capalija, Tarek S. Abdelrahman. Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays. In 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014. pages 1-8, IEEE, 2014. [doi]

@inproceedings{CapalijaA14,
  title = {Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays},
  author = {Davor Capalija and Tarek S. Abdelrahman},
  year = {2014},
  doi = {10.1109/FPL.2014.6927456},
  url = {http://dx.doi.org/10.1109/FPL.2014.6927456},
  researchr = {https://researchr.org/publication/CapalijaA14},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014},
  publisher = {IEEE},
}