Tiago Muller Gil Cardoso, Leomar S. da Rosa Jr., Felipe de Souza Marques, Renato P. Ribas, André Inácio Reis. Speed-Up of ASICs Derived from FPGAs by Transistor Network Synthesis Including Reordering. In 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA. pages 47-52, IEEE Computer Society, 2008. [doi]
Abstract is missing.