Architecture of a high-rate VLSI Viterbi decoder

Emmanuel Casseau, Eric Lüthi. Architecture of a high-rate VLSI Viterbi decoder. In Proceedings of Third International Conference on Electronics, Circuits, and Systems, ICECS 1996, Rodos, Greece, October 13-16, 1996. pages 21-24, IEEE, 1996. [doi]

Abstract

Abstract is missing.