Steve Casselman, John Schewel, Christophe Beaumont. IP Validation for FPGAs Using Hardware Object Technology. In Patrick Lysaght, James Irvine, Reiner W. Hartenstein, editors, Field-Programmable Logic and Applications, 9th International Workshop, FPL 99, Glasgow, UK, August 30 - September 1, 1999, Proceedings. Volume 1673 of Lecture Notes in Computer Science, pages 487-494, Springer, 1999.
@inproceedings{CasselmanSB99,
title = {IP Validation for FPGAs Using Hardware Object Technology},
author = {Steve Casselman and John Schewel and Christophe Beaumont},
year = {1999},
tags = {meta-model, Meta-Environment, meta-objects},
researchr = {https://researchr.org/publication/CasselmanSB99},
cites = {0},
citedby = {0},
pages = {487-494},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop, FPL 99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
editor = {Patrick Lysaght and James Irvine and Reiner W. Hartenstein},
volume = {1673},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-66457-2},
}