Alexandre Castellane, Bruno Mesnet. Enabling Fast and Highly Effective FPGA Design Process Using the CAPI SNAP Framework. In Michèle Weiland, Guido Juckeland, Sadaf R. Alam, Heike Jagode, editors, High Performance Computing - ISC High Performance 2019 International Workshops, Frankfurt, Germany, June 16-20, 2019, Revised Selected Papers. Volume 11887 of Lecture Notes in Computer Science, pages 317-329, Springer, 2019. [doi]
@inproceedings{CastellaneM19,
title = {Enabling Fast and Highly Effective FPGA Design Process Using the CAPI SNAP Framework},
author = {Alexandre Castellane and Bruno Mesnet},
year = {2019},
doi = {10.1007/978-3-030-34356-9_25},
url = {https://doi.org/10.1007/978-3-030-34356-9_25},
researchr = {https://researchr.org/publication/CastellaneM19},
cites = {0},
citedby = {0},
pages = {317-329},
booktitle = {High Performance Computing - ISC High Performance 2019 International Workshops, Frankfurt, Germany, June 16-20, 2019, Revised Selected Papers},
editor = {Michèle Weiland and Guido Juckeland and Sadaf R. Alam and Heike Jagode},
volume = {11887},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-030-34356-9},
}