FPGA-based 3D median filtering using word-parallel systolic arrays

Carlos R. Castro-Pareja, Jogikal M. Jagadeesh, Sharmila Venugopal, Raj Shekhar. FPGA-based 3D median filtering using word-parallel systolic arrays. In ISCAS (3). pages 157-160, 2004. [doi]

Abstract

Abstract is missing.