A 1.2 V, 80-230 MHz, 1.75 mW Phase Locked Loop N- Integer Clock Synthesizer

Mateus Castro, Leonardo Sulato de Moraes, Fabio Kelm Pereira, Eduardo Rodrigues de Lima. A 1.2 V, 80-230 MHz, 1.75 mW Phase Locked Loop N- Integer Clock Synthesizer. In 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, SBCCI 2023, Rio de Janeiro, Brazil, August 28 - Sept. 1, 2023. pages 1-5, IEEE, 2023. [doi]

@inproceedings{CastroMPL23,
  title = {A 1.2 V, 80-230 MHz, 1.75 mW Phase Locked Loop N- Integer Clock Synthesizer},
  author = {Mateus Castro and Leonardo Sulato de Moraes and Fabio Kelm Pereira and Eduardo Rodrigues de Lima},
  year = {2023},
  doi = {10.1109/SBCCI60457.2023.10261958},
  url = {https://doi.org/10.1109/SBCCI60457.2023.10261958},
  researchr = {https://researchr.org/publication/CastroMPL23},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, SBCCI 2023, Rio de Janeiro, Brazil, August 28 - Sept. 1, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-1834-0},
}