Design and Implementation of Ultrashort Baseline Transmission and Data Acquisition Module Based on FPGA

Xian Cen, Junfeng Chen, Zhaotong Zhu, Jing Wang, Shilong Xu, Yingying Xia. Design and Implementation of Ultrashort Baseline Transmission and Data Acquisition Module Based on FPGA. In IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2023, Zhengzhou, China, November 14-17, 2023. pages 1-5, IEEE, 2023. [doi]

Abstract

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