A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS - researchr publication bibliographies

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P. Cenci, M. Bolatkale, R. Rutten, M. Ganzerli, G. Lassche, K. Makinwa, L. Breems. A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 230, IEEE, 2019. [doi]

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