A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops

Francesco Centurelli, Giuseppe Scotti, Gaetano Palumbo. A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops. IEEE Trans. VLSI Syst., 29(5):998-1008, 2021. [doi]

@article{CenturelliSP21,
  title = {A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops},
  author = {Francesco Centurelli and Giuseppe Scotti and Gaetano Palumbo},
  year = {2021},
  doi = {10.1109/TVLSI.2021.3058730},
  url = {https://doi.org/10.1109/TVLSI.2021.3058730},
  researchr = {https://researchr.org/publication/CenturelliSP21},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {29},
  number = {5},
  pages = {998-1008},
}