Delay models and design guidelines for MCML gates with resistor or PMOS load

Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti, Gaetano Palumbo. Delay models and design guidelines for MCML gates with resistor or PMOS load. Microelectronics Journal, 99:104755, 2020. [doi]

@article{CenturelliSTP20,
  title = {Delay models and design guidelines for MCML gates with resistor or PMOS load},
  author = {Francesco Centurelli and Giuseppe Scotti and Alessandro Trifiletti and Gaetano Palumbo},
  year = {2020},
  doi = {10.1016/j.mejo.2020.104755},
  url = {https://doi.org/10.1016/j.mejo.2020.104755},
  researchr = {https://researchr.org/publication/CenturelliSTP20},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {99},
  pages = {104755},
}