A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm - researchr publication authors

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Raul Cernea, Long Pham, Farookh Moogat, Siu Lung Chan, Binh Le, Yan Li, Shouchang Tsao, Taiyuan Tseng, Khanh Nguyen, Jason Li, Jayson Hu, Jong Park, Cynthia Hsu, Fanglin Zhang, Teruhiko Kamei, Hiroaki Nasu, Phil Kliza, Khin Htoo, Jeffery Lutze, Yingda Dong, Masaaki Higashitani, Junhui Yang, Hung-Szu Lin, Vamshi Sakhamuri, Alan Li, Feng Pan, Sridhar Yadala, Subodh Taigor, Kishan Pradhan, James Lan, Jim Chan, Takumi Abe, Yasuyuki Fukuda, Hideo Mukai, Koichi Kawakami, Connie Liang, Tommy Ip, Shu-Fen Chang, Jaggi Lakshmipathi, Sharon Huynh, Dimitris Pantelakis, Mehrdad Mofidi, Khandker Quader. A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 420-421, IEEE, 2008. [doi]

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