An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation

Sevket Cetinsel, Richard C. S. Morling, Izzet Kale. An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation. In 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011. pages 397-400, IEEE, 2011. [doi]

Authors

Sevket Cetinsel

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Richard C. S. Morling

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Izzet Kale

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