Sevket Cetinsel, Richard C. S. Morling, Izzet Kale. An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation. In 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011. pages 397-400, IEEE, 2011. [doi]
@inproceedings{CetinselMK11,
title = {An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation},
author = {Sevket Cetinsel and Richard C. S. Morling and Izzet Kale},
year = {2011},
doi = {10.1109/ECCTD.2011.6043370},
url = {http://dx.doi.org/10.1109/ECCTD.2011.6043370},
researchr = {https://researchr.org/publication/CetinselMK11},
cites = {0},
citedby = {0},
pages = {397-400},
booktitle = {20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011},
publisher = {IEEE},
isbn = {978-1-4577-0617-2},
}