Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne. Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. In Mike Hutton, Paul Chow, editors, Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008. pages 181-190, ACM, 2008. [doi]
@inproceedings{CevreroAPVBGLI08,
title = {Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs},
author = {Alessandro Cevrero and Panagiotis Athanasopoulos and Hadi Parandeh-Afshar and Ajay K. Verma and Philip Brisk and Frank K. Gürkaynak and Yusuf Leblebici and Paolo Ienne},
year = {2008},
doi = {10.1145/1344671.1344699},
url = {http://doi.acm.org/10.1145/1344671.1344699},
tags = {architecture},
researchr = {https://researchr.org/publication/CevreroAPVBGLI08},
cites = {0},
citedby = {0},
pages = {181-190},
booktitle = {Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008},
editor = {Mike Hutton and Paul Chow},
publisher = {ACM},
isbn = {978-1-59593-934-0},
}