Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs

Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne. Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. In Mike Hutton, Paul Chow, editors, Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008. pages 181-190, ACM, 2008. [doi]

Abstract

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