COOL interconnect low power interconnection technology for scalable 3D LSI design

Marco Chacin, Hiroyuki Uchida, Michiya Hagimoto, Takashi Miyazaki, Takeshi Ohkawa, Rimon Ikeno, Yukoh Matsumoto, Fumito Imura, Motohiro Suzuki, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi. COOL interconnect low power interconnection technology for scalable 3D LSI design. In 2011 IEEE Symposium on Low-Power and High-Speed Chips, Cool Chips XIV, Yokohama, 20-22 April, 2011. pages 1-3, IEEE, 2011. [doi]

Abstract

Abstract is missing.