Changseon Chae, Subin Kim, Jonghang Choi, Jun-Eun Park. A Multi-Bit In-Memory-Computing SRAM Macro Using Column-Wise Charge Redistribution for DNN Inference in Edge Computing Devices. In 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021. pages 421-422, IEEE, 2021. [doi]
@inproceedings{ChaeKCP21,
title = {A Multi-Bit In-Memory-Computing SRAM Macro Using Column-Wise Charge Redistribution for DNN Inference in Edge Computing Devices},
author = {Changseon Chae and Subin Kim and Jonghang Choi and Jun-Eun Park},
year = {2021},
doi = {10.1109/ISOCC53507.2021.9613934},
url = {https://doi.org/10.1109/ISOCC53507.2021.9613934},
researchr = {https://researchr.org/publication/ChaeKCP21},
cites = {0},
citedby = {0},
pages = {421-422},
booktitle = {18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021},
publisher = {IEEE},
isbn = {978-1-6654-0174-6},
}