A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC

Yun Chai, Jieh-Tsorng Wu. A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC. J. Solid-State Circuits, 47(12):2905-2915, 2012. [doi]

@article{ChaiW12-0,
  title = {A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC},
  author = {Yun Chai and Jieh-Tsorng Wu},
  year = {2012},
  doi = {10.1109/JSSC.2012.2217872},
  url = {http://dx.doi.org/10.1109/JSSC.2012.2217872},
  researchr = {https://researchr.org/publication/ChaiW12-0},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {47},
  number = {12},
  pages = {2905-2915},
}