Static energy reduction by performance linked dynamic cache resizing

Shounak Chakraborty, Hemangee K. Kapoor. Static energy reduction by performance linked dynamic cache resizing. In 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016. pages 1-6, IEEE, 2016. [doi]

@inproceedings{ChakrabortyK16-2,
  title = {Static energy reduction by performance linked dynamic cache resizing},
  author = {Shounak Chakraborty and Hemangee K. Kapoor},
  year = {2016},
  doi = {10.1109/VLSI-SoC.2016.7753549},
  url = {http://dx.doi.org/10.1109/VLSI-SoC.2016.7753549},
  researchr = {https://researchr.org/publication/ChakrabortyK16-2},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3561-8},
}