Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu. An efficient timing model for hardware implementation of multirate dataflow graphs. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt Lake City, Utah, USA, Proceedings. pages 1153-1156, IEEE, 2001. [doi]
@inproceedings{ChandrachoodanBL01-0,
title = {An efficient timing model for hardware implementation of multirate dataflow graphs},
author = {Nitin Chandrachoodan and Shuvra S. Bhattacharyya and K. J. Ray Liu},
year = {2001},
doi = {10.1109/ICASSP.2001.941126},
url = {http://doi.ieeecomputersociety.org/10.1109/ICASSP.2001.941126},
researchr = {https://researchr.org/publication/ChandrachoodanBL01-0},
cites = {0},
citedby = {0},
pages = {1153-1156},
booktitle = {IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt Lake City, Utah, USA, Proceedings},
publisher = {IEEE},
isbn = {0-7803-7041-4},
}