Hsung-Pin Chang, Yu-Cain He, Da-Wei Chang. An Integrated Memory and SSD Caching I/O Subsystem. In Sorel Reisman, Sheikh Iqbal Ahamed, Claudio Demartini, Thomas M. Conte, Ling Liu 0001, William R. Claycomb, Motonori Nakamura, Edmundo Tovar, Stelvio Cimato, Chung-Horng Lung, Hiroki Takakura, Ji-Jiang Yang, Toyokazu Akiyama, Zhiyong Zhang 0002, Kamrul Hasan, editors, 2018 IEEE 42nd Annual Computer Software and Applications Conference, COMPSAC 2018, Tokyo, Japan, 23-27 July 2018, Volume 1. pages 823-824, IEEE Computer Society, 2018. [doi]
@inproceedings{ChangHC18-0,
title = {An Integrated Memory and SSD Caching I/O Subsystem},
author = {Hsung-Pin Chang and Yu-Cain He and Da-Wei Chang},
year = {2018},
doi = {10.1109/COMPSAC.2018.00138},
url = {http://doi.ieeecomputersociety.org/10.1109/COMPSAC.2018.00138},
researchr = {https://researchr.org/publication/ChangHC18-0},
cites = {0},
citedby = {0},
pages = {823-824},
booktitle = {2018 IEEE 42nd Annual Computer Software and Applications Conference, COMPSAC 2018, Tokyo, Japan, 23-27 July 2018, Volume 1},
editor = {Sorel Reisman and Sheikh Iqbal Ahamed and Claudio Demartini and Thomas M. Conte and Ling Liu 0001 and William R. Claycomb and Motonori Nakamura and Edmundo Tovar and Stelvio Cimato and Chung-Horng Lung and Hiroki Takakura and Ji-Jiang Yang and Toyokazu Akiyama and Zhiyong Zhang 0002 and Kamrul Hasan},
publisher = {IEEE Computer Society},
isbn = {978-1-5386-2667-2},
}