2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Ting-Jung Chang, Ang Li, Fei Gao 0016, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu 0001, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, David Wentzlaff. 2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA. In IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, TX, USA, April 23-26, 2023. pages 1-2, IEEE, 2023. [doi]

Abstract

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