Multi-level memory systems using error control codes

Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang. Multi-level memory systems using error control codes. In ISCAS (4). pages 393-396, 2004.

Authors

Hsie-Chia Chang

This author has not been identified. Look up 'Hsie-Chia Chang' in Google

Chien-Ching Lin

This author has not been identified. Look up 'Chien-Ching Lin' in Google

Tien-Yuan Hsiao

This author has not been identified. Look up 'Tien-Yuan Hsiao' in Google

Jieh-Tsorng Wu

This author has not been identified. Look up 'Jieh-Tsorng Wu' in Google

Ta-Hui Wang

This author has not been identified. Look up 'Ta-Hui Wang' in Google