A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro

Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Sue-Meng Yang, Ku-Feng Lin, Wen-Chao Shen, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih. A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro. J. Solid-State Circuits, 48(9):2250-2259, 2013. [doi]

@article{ChangWKSYLSKLC13,
  title = {A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro},
  author = {Meng-Fan Chang and Che-Wei Wu and Chia-Chen Kuo and Shin-Jang Shen and Sue-Meng Yang and Ku-Feng Lin and Wen-Chao Shen and Ya-Chin King and Chorng-Jung Lin and Yu-Der Chih},
  year = {2013},
  doi = {10.1109/JSSC.2013.2259713},
  url = {http://dx.doi.org/10.1109/JSSC.2013.2259713},
  researchr = {https://researchr.org/publication/ChangWKSYLSKLC13},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {48},
  number = {9},
  pages = {2250-2259},
}