3D vs. 2D analysis of FinFET logic gates under process variations

Sourindra Chaudhuri, Niraj K. Jha. 3D vs. 2D analysis of FinFET logic gates under process variations. In IEEE 29th International Conference on Computer Design, ICCD 2011, Amherst, MA, USA, October 9-12, 2011. pages 435-436, IEEE, 2011. [doi]

Authors

Sourindra Chaudhuri

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Niraj K. Jha

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