Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETs

Sourindra M. Chaudhuri, Niraj K. Jha. Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETs. JETC, 12(4):43, 2016. [doi]

Authors

Sourindra M. Chaudhuri

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Niraj K. Jha

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