Sourindra M. Chaudhuri, Niraj K. Jha. Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETs. JETC, 12(4):43, 2016. [doi]
@article{ChaudhuriJ16,
title = {Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETs},
author = {Sourindra M. Chaudhuri and Niraj K. Jha},
year = {2016},
doi = {10.1145/2832913},
url = {http://doi.acm.org/10.1145/2832913},
researchr = {https://researchr.org/publication/ChaudhuriJ16},
cites = {0},
citedby = {0},
journal = {JETC},
volume = {12},
number = {4},
pages = {43},
}