Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures

Ameet Chavan, Gaurav Dukle, Ben Graniello, Eric MacDonald. Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures. In René Cumplido-Parra, Cesar Torres-Huitzil, Andrés D. García, editors, 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006. pages 142-148, IEEE Computer Society, 2006. [doi]

@inproceedings{ChavanDGM06,
  title = {Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures},
  author = {Ameet Chavan and Gaurav Dukle and Ben Graniello and Eric MacDonald},
  year = {2006},
  doi = {10.1109/RECONF.2006.307764},
  url = {http://doi.ieeecomputersociety.org/10.1109/RECONF.2006.307764},
  researchr = {https://researchr.org/publication/ChavanDGM06},
  cites = {0},
  citedby = {0},
  pages = {142-148},
  booktitle = {2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006},
  editor = {René Cumplido-Parra and Cesar Torres-Huitzil and Andrés D. García},
  publisher = {IEEE Computer Society},
  isbn = {1-4244-0690-0},
}