Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results

Robert Chebli, Mohamad Sawan, Yvon Savaria. Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results. In 12th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2005, Gammarth, Tunisia, December 11-14, 2005. pages 1-4, IEEE, 2005. [doi]

Authors

Robert Chebli

This author has not been identified. Look up 'Robert Chebli' in Google

Mohamad Sawan

This author has not been identified. Look up 'Mohamad Sawan' in Google

Yvon Savaria

This author has not been identified. Look up 'Yvon Savaria' in Google