Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results

Robert Chebli, Mohamad Sawan, Yvon Savaria. Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results. In 12th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2005, Gammarth, Tunisia, December 11-14, 2005. pages 1-4, IEEE, 2005. [doi]

@inproceedings{ChebliSS05,
  title = {Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results},
  author = {Robert Chebli and Mohamad Sawan and Yvon Savaria},
  year = {2005},
  doi = {10.1109/ICECS.2005.4633435},
  url = {http://dx.doi.org/10.1109/ICECS.2005.4633435},
  researchr = {https://researchr.org/publication/ChebliSS05},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {12th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2005, Gammarth, Tunisia, December 11-14, 2005},
  publisher = {IEEE},
  isbn = {978-9972-61-100-1},
}