Pao-Lung Chen. Jitter simulation and measurement of an all-digital clock generator with dynamic frequency counting loop. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2554-2557, IEEE, 2008. [doi]
@inproceedings{Chen08a:11,
title = {Jitter simulation and measurement of an all-digital clock generator with dynamic frequency counting loop},
author = {Pao-Lung Chen},
year = {2008},
doi = {10.1109/ISCAS.2008.4541977},
url = {http://dx.doi.org/10.1109/ISCAS.2008.4541977},
researchr = {https://researchr.org/publication/Chen08a%3A11},
cites = {0},
citedby = {0},
pages = {2554-2557},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
publisher = {IEEE},
}